In: Proceedings of the Fifth Workshop on Electronics for LHC experiments , (1999),

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Abstract

Dieses Papier stellt den Entwurf und Simulationsergebnisse von Komponenten dar, die fuer einen Auslesechip fuer das Experiment LHCb am CERN vorgesehen sind. Es werden ein ladungsempfindlicher rauscharmer Verstaerker sowie verschiedene Komponenten zur Strom- und Spannungsversorgung vorgestellt.

Translation of abstract (English)

This paper presents the design and simulation results of components for a new LHCb readout chip for the silicon vertex detector, the inner tracking system, the pile-up veto trigger and the RICH. It is planned to use the same readout chip for these subdetectors. In section 1, the specification of the new readout chip named Beetle with respect to the different subdetector systems is described. Sections 2 and 3 describe the design and the simulation results of two test chips. The first chip contains different types of frontends for the vertex detector and the second chip bias generators.